When opening an IPC-D-356 file, the test pads for both the top and bottom sides are extracted to the Test pads top and Test pads bottom layers, respectively. The net name, designator and pin number is also extracted for each test pad. Other information in the IPC-D-356 file is ignored.
Most CAD systems can generate an IPC-D-356 file, which contains important information for electrical test of the bare PCB during manufacture. Since only a subset of this information is imported to the test pads layers, the complete file is also attached to the product, so that it is available to the manufacturer.
Note: Do not confuse test pads with test points or test pins.
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Test pads are the locations for bare-board testing of the PCB during manufacture, which are extracted from an IPC-D-356 file to the Test pads layers.
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Test points are specific pads or pins on the PCBA which would be used for in-circuit testing. For each test point, a “component” (with the Test point component class) should be added to the appropriate component layer. Ideally, test points (with TPxx designators) should be included in Pick and Place data, but they may also be created manually.
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Test pins are the pins in a test fixture which will make contact with the PCBA during in-circuit testing.
Merge action
For each component on a component layers, the corresponding test pad layer is scanned for test pads with a matching designator.
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A Footprint outline is derived from the outlines of all pins.
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If the component has more than two pins, then pin 1 or pin A1 is marked as the key pin. If there is no pin 1 or pin A1, then pin B1, A2 or B2 is marked (if found).
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If the component has two pins, if one of the pins has a pin number beginning with K or C (for cathode) or P (for plus), it is marked as the key pin. Otherwise, no key pin is marked.